EDN

Hierarchical test improves pattern application efficiency

For over 15 years, I've been a big proponent of hierarchical test. Hierarchical test is the commonly used term for creating DFT (design-for-test) features and test patterns at lower level circuit ...
Hackaday

test pattern

[Nicholas Murray]’s Composite Test Pattern Generator is a beautifully-made, palm-sized tool that uses an ESP32-based development board to output different test patterns in PAL/NTSC. If one is checking ...
EDN

New test points slash ATPG test pattern count

Scan testing has been the foundation of digital-device production test for many years. Several innovations have been developed to keep up with the growth in pattern-set sizes brought about by large ...
Design-Reuse

Configurable VESA - VGA and DVI Test Pattern Generator

This paper is presented with the Video Graphics Array (VGA) and Digital Visual Interface - Digital (DVI-D) test pattern generator solution with display monitor timing specification as per the Video ...
Electronic Design

Using EDT Test Points to Reduce Test Time and Cost

The exponential growth in design sizes has rendered the traditional methods of design-for-test, layout, and timing closure no longer sufficient. Design and test engineers not only have to constantly ...