TPUs are Google’s specialized ASICs built exclusively for accelerating tensor-heavy matrix multiplication used in deep learning models. TPUs use vast parallelism and matrix multiply units (MXUs) to ...

A custom-built chip for machine learning from Google. Introduced in 2016 and found only in Google datacenters, the Tensor Processing Unit (TPU) is optimized for matrix multiplications, which are ...

The NVIDIA-Groq $20 billion deal announced on December 24, 2025 is a major strategic move in the AI hardware space. NVIDIA ...

Google unveiled a new chip, Trillium, for training and running foundation large language models such as Gemma and Gemini at its annual I/O conference on Tuesday. Trillium is the sixth iteration of ...