Semiconductor Engineering

Adding Cost, Cycle Time, And Carbon Footprint To PPA Design Targets

Power, performance, and area metrics alone are no longer sufficient to capture the full range of design goals.
EurekAlert!

Flowchart of the high-efficiency RIS design paradigm. (IMAGE)

(a) Unit optimization process with a hybrid continuous-discrete PSO algorithm. The particulars of the yellow and green boxes in the optimization are elaborated in (b) and (c), respectively. (b) The ...
Semiconductor Engineering

Predictable Design Optimization And Closure With Adaptive Scenario Compression

Modern semiconductor chip design faces growing complexity due to numerous timing scenarios driven by varying operating ...
Design-Reuse

Analog Power Conversion LLC adopts Silvaco s Design Technology Co-Optimization Flow for Next Generation Silicon and Silicon Carbide Power Devices

Silvaco Group, Inc. (“Silvaco”) (NASDAQ: SVCO), a provider of TCAD, EDA software, and SIP solutions that enable semiconductor design and digital twin modeling through AI software and innovation, today ...
Electronic Design

Adopting AI-Based Circuit Optimization and Migration

Why has analog design been a manual process? How artificial intelligence is improving the EDA process. The use of artificial intelligence (AI) has gained significant traction in many domains of EDA, ...
EDN

From system design to SiP: What’s the design flow

Like any successful system-on-chip (SoC) effort, a multi-die system-in-package (SiP) project must start with a sound system design. But then what? Are the steps in the SiP design flow different from ...